Associate Professor Braden Phillips

• Journals

  Year	Citation
  2022	Yuan, X., Liebelt, M. J., Shi, P., & Phillips, B. J. (2022). Cognitive decisions based on a rule-based fuzzy system. Information Sciences, 600, 323-341. DOI Scopus5 WoS1
  2021	Yuan, X., Liebelt, M. J., Shi, P., & Phillips, B. J. (2021). Creating rule-based agents for artificial general intelligence using association rules mining. International Journal of Machine Learning and Cybernetics, 12(1), 223-230. DOI Scopus5 WoS6
  2020	Numan, M. W., Phillips, B. J., Puddy, G. S., & Falkner, K. (2020). Towards Automatic High-Level Code Deployment on Reconfigurable Platforms: A Survey of High-Level Synthesis Tools and Toolchains. IEEE ACCESS, 8, 174692-174722. DOI Scopus25 WoS13
  2015	Wang, P., Phillips, B., & Liebelt, M. (2015). Memristor-based activation circuit for longterm memories in cognitive architectures. Electronics Letters, 51(21), 1639-1641. DOI
  2012	Kitchener, J., & Phillips, B. (2012). Starved picowatt oscillator for remote sensor wake-up timer. Electronics Letters, 48(12), 686-687. DOI
  2011	Kelly, D., Phillips, B., & Al-Sarawi, S. (2011). Approximate multiplication and division for arithmetic data value speculation in a RISC processor. Lecture Notes in Electrical Engineering, 73 LNEE, 95-116. DOI Scopus1
  2010	Kong, Y., & Phillips, B. (2010). Revisiting sum of residues modular multiplication. Journal of Electrical & Computer Engineering, 2010(1), 1-9. DOI Scopus5
  2010	Phillips, B., Kong, Y., & Lim, Z. (2010). Highly parallel modular multiplication in the residue number system using sum of residues reduction. Applicable Algebra in Engineering Communication and Computing, 21(3), 249-255. DOI Scopus15 WoS10
  2010	Nikmehr, H., Phillips, B., & Lim, C. (2010). A novel implementation of radix-4 floating-point division/square-root using comparison multiples. Computers & Electrical Engineering, 36(5 Sp Iss), 850-863. DOI Scopus4 WoS2
  2009	Kong, Y., & Phillips, B. (2009). Fast scaling in the residue number system. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 17(3), 443-447. DOI Scopus32 WoS23
  2007	Nikmehr, H., Phillips, B., & Lim, C. (2007). A fast radix-4 floating-point divider with quotient digit selection by comparison multiples. Computer Journal, 50(1), 81-92. DOI Scopus2 WoS3
  2006	Nikmehr, H., Phillips, B., & Lim, C. (2006). Fast decimal floating-point division. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 14(9), 951-961. DOI Scopus42 WoS34
  2005	Nikmehr, H., Phillips, B., & Lim, C. -C. (2005). A Fast Combined Decimal Adder/Subtractor.
  2004	Phillips, B., & Burgess, N. (2004). Minimal weight digit set conversions. IEEE Transactions on Computers, 53(6), 666-677. DOI Scopus22 WoS17
  2001	Phillips, B. (2001). Montgomery residue number systems. Electronics Letters, 37(21), 1286-1287. DOI Scopus1 WoS1
  2000	Phillips, B., & Burgess, N. (2000). Signed sliding window algorithms for modulo multiplication. Electronics Letters, 36(23), 1925-1927. DOI Scopus2 WoS2

• Book Chapters

  Year	Citation
  2019	Davidson, R., Snelling, C., Crotti, T., Karanicolas, S., & Phillips, B. (2019). Authentic Assessment as a Tool to Bridge the Transition Between Learning and Work. In A. Diver (Ed.), Employability via Higher Education: Sustainability as Scholarship (pp. 255-274). Cham, Switzerland: Springer Nature. DOI
  2010	Kelly, D. R., Phillips, B. J., & Al-Sarawi, S. F. (2010). Approximate multiplication and division for arithmetic data value speculation in a RISC processor. In G. Gogniat, D. Milojevic, A. Morawiec, & A. Erdogan (Eds.), Algorithm-Architecture Matching for Signal and Image Processing Best papers from Design and Architectures for Signal and Image Processing 2007 & 2008 & 2009 (pp. 95-116). Springer Science & Business Media.
  2005	Kelly, D., & Phillips, B. (2005). Arithmetic data value speculation. In T. Srikanthan, J. Xue, & C. Chang (Eds.), Advances in Computer Systems Architecture (Vol. 3740 LNCS, pp. 353-366). Berlin, Heidelberg: Springer. DOI Scopus23 WoS16
  1997	Phillips, B., Burgess, N., & Lever, K. (1997). Regularisation procedures for iterated recursive digital filters. In Digital Signal Processing for Communication Systems. Boston, USA: Kluwer Academic Publishers.

• Conference Papers

  Year	Citation
  2020	Tripathi, M., Phillips, B., & Sorell, M. (2020). Bring your own spectrum (BYOS)–A tiered architecture supporting flexible spectrum allocation. In 30th European Regional ITS Conference (pp. 1-15). online: ZBW.
  2019	Bui, T., & Phillips, B. (2019). A scalable network-on-chip based neural network implementation on FPGAs. In RIVF 2019 - Proceedings: 2019 IEEE-RIVF International Conference on Computing and Communication Technologies (pp. 1-6). online: IEEE. DOI Scopus5
  2019	Yuan, X., Liebelt, M. J., Shi, P., & Phillips, B. J. (2019). Development of rule-based agents for autonomous parking systems by association rules mining. In Proceedings of the 19th International Conference on Machine Learning and Cybernetics (ICMLC 2019) Vol. 2019-July (pp. 1-6). Piscataway, NJ: IEEE. DOI WoS2
  2017	Yuan, X., Liebelt, M., & Phillips, B. (2017). A cognitive approach for reproducing the homing behaviour of honey bees. In Proceedings of the 9th International Conference on Agents and Artificial Intelligence Vol. 2 (pp. 543-550). Portugal: SCITEPRESS. DOI Scopus3 WoS3
  2017	Phillips, B., & Liebelt, M. (2017). A Flipped Classroom with Low-stakes Assessment to Maintain Student Engagement and Integrate Theory and Practice. In 28th Annual Conference of the Australasian Association for Engineering Education (AAEE 2017) (pp. 639-646). online: AAEE.
  2017	Liebelt, M., eglinton-warner, S., soong, W., al-sarawi, S., ng, B., phillips, B., & sorell, M. (2017). An Engineering Approach to Engineering Curriculum Design. In 28th Annual Conference of the Australasian Association for Engineering Education (AAEE 2017) (pp. 777-784). online: AAEE.
  2016	Phillips, B., Liebelt, M., & Bui, T. (2016). A Dynamically Reconfigurable NoC for Double-Precision Floating-Point FFT on FPGAs. In CENICS 2016 (pp. 52-57). Online: IARIA.
  2016	Wang, P., & Phillips, B. (2016). Design and evaluation of content addressable memory using redox memristive devices. In 16th International Conference on Nanotechnology - IEEE NANO 2016 (pp. 533-536). IEEE Nanotechnol Council, Sendai, JAPAN: IEEE. DOI
  2015	Li, F., Frost, J., & Phillips, B. (2015). An episodic memory retrieval algorithm for the soar cognitive architecture. In B. Pfahringer, & J. Renz (Eds.), Proceedings of the 28th Australasian Joint Conference on Artificial Intelligence Vol. 9457 (pp. 343-355). Canberra, ACT: Springer. DOI Scopus2 WoS2
  2015	Frost, J., Numan, M., Liebelt, M., & Phillips, B. (2015). A new computer for cognitive computing. In Proceedings of the 14th IEEE International Conference on Cognitive Informatics & Cognitive Computing (pp. 33-38). Beijing, China: IEEE. DOI Scopus8 WoS6
  2015	Numan, M., Frost, J., Phillips, B., & Liebelt, M. (2015). A network-based communication platform for a cognitive computer. In A. Lieto, C. Battaglino, D. Radicioni, & M. Sanguinetti (Eds.), Proceedings of the 3rd International Workshop on Artificial Intelligence and Cognition Vol. 1510 (pp. 94-103). Turin, Italy: RWTH Aachen * Lehrstuhl Informatik V. Scopus4
  2012	Li, F., Khan, M., Liebelt, M., Ng, B., & Phillips, B. (2012). Is there a smarter way to use 100 billion transistors?. In Proceedings of the Asilomar Conference on Signals, Systems, and Computers, Asilomar 2012 (pp. 619-620). USA: IEEE. DOI
  2010	Ng, B., Al-Sarawi, S., Willison, J., Phillips, B., Liebelt, M., & Green, C. (2010). A New Electronic Engineering Honours Assessment Scheme Based on Research Skills Development Framework. In The Education Research Group of Adelaid (pp. The Changing Face of Education, 24-25 September, 2010). Adelaide, Australia.
  2009	Kelly, D., Phillips, B., & Al-Sarawi, S. (2009). Approximate signed binary integer multipliers for arithmetic data value speculation. In Marco Mattavelli (Ed.), Proceedings of the Conference on Design and Architectures for Signal and Image Processing (DASIP) 2009 (pp. 97-104). online: ECSI.
  2009	Kelly, D., Phillips, B., & Al-Sarawi, S. (2009). Approximate unsigned binary integer dividers for arithmetic data value speculation. In Marco Mattavelli (Ed.), Proceedings of the Conference on Design and Architectures for Signal and Image Processing (DASIP) 2009 (pp. 105-112). online: ECSI.
  2009	Kelly, D., Phillips, B., & Al-Sarawi, S. (2009). Increasing throughput of a RISC architecture using arithmetic data value speculation. In Proceedings of Asilomar 2009 (pp. 915-920). CD: IEEE. DOI Scopus3
  2009	Lim, Z., Phillips, B., & Liebelt, M. (2009). Elliptic curve digital signature algorithm over GF(p) on a residue number system enabled microprocessor. In Proceedings of TENCON 2009 (pp. 1-6). CDROM: IEEE. DOI Scopus9
  2008	Pinckney, N., Barr, T., Dayringer, M., McKnett, M., Jiang, N., Nygaard, C., . . . Phillips, B. (2008). A MIPS R2000 implementation. In Proceedings of the Annual ACM IEEE Design Automation Conference (pp. 102-107). United States: IEEE Computer Society. DOI Scopus8 WoS4
  2008	Phillips, B., Schmidt, C., & Kelly, D. (2008). Recovering data from USB Flash memory sticks that have been damaged or electronically erased. In Proceedings of e-Forensics 2008 (pp. 1-6). CD: IEEE. DOI Scopus4
  2008	Blaauw, D., Kitchener, J., & Phillips, B. (2008). Optimizing addition for sub-threshold logic. In Proceedings of the Forty-Second Asilomar Conference on Signals, Systems and Computers (pp. 751-756). CD: IEEE. DOI Scopus3
  2008	Moric, R., Phillips, B., & Liebelt, M. (2008). Defect tolerant prefix adder design. In Proceedings of the SPIE Smart Materials, Nano-, and Micro-Smart Systems 2008 Vol. 7268 (pp. 1-9). CD: SPIE. DOI Scopus1
  2007	Lim, Z., & Phillips, B. (2007). An RNS-enhanced microprocessor implementation of public key cryptography. In Proceedings of the 41st Asilomar Conference on Signals, Systems & Computers (pp. 1430-1434). CDROM: IEEE. DOI Scopus7 WoS7
  2007	Kong, Y., & Phillips, B. (2007). Simulations of modular multipliers on FPGA. In H. Ma (Ed.), Proceedings of the IASTED Asian Conference on Modelling and Simulation (pp. 128-131). CDROM: IASTED.
  2007	Coleman, T., Kitchener, J., Pudney, D., Wauchope, K., & Phillips, B. (2007). An RNS public key cryptography accelerator. In S. Al-Sarawi (Ed.), Proceedings of Smart Materials, Nano- and Micro-Smart Systems Vol. 6414 (pp. 1-7). USA: SPIE. DOI
  2007	Kelly, D., Phillips, B., & Al-Sarawi, S. (2007). An open source synthesisable model in VHDL of a 64-bit MIPS-based processor. In S. Al-Sarawi (Ed.), Proceedings of Smart Materials, Nano- and Micro-Smart Systems Vol. 6414 (pp. 1-9). USA: SPIE. DOI
  2006	Kong, Y., & Phillips, B. (2006). Comparison of Montgomery and Barrett modular multipliers on FPGAs. In Victor DeBrunner (Ed.), Proceedings of the Fortieth Asilomar Conference on Signals, Systems & Computers (pp. CDROM1687-CDROM1691). CDROM: IEEE. DOI Scopus5 WoS3
  2006	Phillips, B., Kelly, D., & Ng, B. (2006). Estimating adders for a low density parity check decoder. In F. Luk (Ed.), Proceedings of Advanced Signal Processing Algorithms, Architectures, and Implementations XVI Vol. 6313 (pp. 631302-1-631302-9). USA: SPIE. DOI Scopus23 WoS6
  2005	Kong, Y., & Phillips, B. (2005). Residue number system scaling schemes. In S. Al Sarawi (Ed.), Proceedings of the SPIE International Symposium on Smart Structures, Devices, and Systems II Vol. 5649 (pp. 525-536). Bellingham, Washington, USA: SPIE. DOI Scopus4 WoS4
  2005	Nikmehr, H., Phillips, B., & Lim, C. (2005). A decimal carry-free adder. In S. Al Sarawi (Ed.), Proceedings of the SPIE International Symposium on Smart Structures, Devices, and Systems II Vol. 5649 (pp. 786-797). Bellingham, Washington, USA: SPIE. DOI Scopus21 WoS6
  2005	Phillips, B. (2005). A merged modular/non-modular multiplier. In S. Al Sarawi (Ed.), Proceedings of the SPIE International Symposium on Smart Structures, Devices, and Systems II Vol. 5649 (pp. 118-125). Bellingham, Washington, USA: SPIE. DOI
  2005	Rajagopalan, K., Phillips, B., & Abbott, D. (2005). On-the-fly reconfigurable logic. In S. Al Sarawi (Ed.), Proceedings of the SPIE International Symposium on Smart Structures, Devices, and Systems II Vol. 5649 (pp. 101-109). Bellingham, Washington, USA: SPIE. DOI Scopus1
  2004	Tan, D., Haddad, A., & Phillips, B. (2004). An event driven real time operating system. In A. Rubinov, & M. Sniedovich (Eds.), Proceedings of the 6th International Conference on Optimization Techniques and Application 2004 (pp. CD-ROM 1-CD-ROM 8). CD-ROM: University of Ballarat.
  2003	Phillips, B. (2003). Scaling and reduction in the residue number system with pairs of conjugate moduli. In G. Jullien (Ed.), Proceedings of the 37th Asilomar Conference on Signals, Systems & Computers 2003 Vol. 2 (pp. CDROM 2247-CDROM 2251). CDROM: IEEE. DOI Scopus3 WoS2
  2001	Phillips, B. (2001). Optimised squaring of long integers using precomputed partial products. In 15th IEEE Symposium on Computer Arithetic (pp. 73-79). Vail, CO, USA: IEEE COMPUTER SOC. DOI Scopus2 WoS2
  2001	Phillips, B. (2001). Modular multiplication in the Montgomery residue number system. In Conference Reocrd of the Thirty Fifth Asilomar Conference on Signals, Systems and Computers, Pacific Grove, California, 2001: vol. 2 Vol. 2 (pp. 1637-1649). Pacific Grove, California, USA: IEEE - Institute of Electrical and Electronics Engineers. DOI Scopus2 WoS2
  2000	Phillips, B. J., & Burgess, N. (2000). Implementing 1,024-bit RSA exponentiation on a 32-bit processor core. In E. E. Swartzlander, G. A. Jullien, & M. J. Schulte (Eds.), Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors (pp. 127-137). BOSTON, MA: IEEE COMPUTER SOC. DOI Scopus17 WoS13
  2000	Phillips, B., & Burgess, N. (2000). Optimized squaring with sliding windows. In M. B. Matthews (Ed.), Conference Record of the Asilomar Conference on Signals, Systems and Computers Vol. 1 (pp. 130-133). PACIFIC GROVE, CA: IEEE. Scopus4
  2000	Phillips, B. J., & Burgess, N. (2000). Optimized squaring with sliding windows. In 34th Asilomar Conference on Signals, Systems, and Computers. California.

• Conference Items

  Year	Citation
  2019	Matthews, R. H., Phillips, B., & Sorell, M. (2019). How security ready is the Australia Space Industry? The challenges of digital security in space. Poster session presented at the meeting of http://www.nssa.com.au/19asrc/resources/19ASRC_Program_Abstracts.pdf. Adelaide, South Australia.

• Software

  Year	Citation
  2015	Phillips, B. J., & Frost, J. (2015). JavaStreet [Computer Software].

At various times I have coordinated the following courses or their predecessors:

• ELEC ENG 1100 Analog Electronics
• ELEC ENG 1101 Electronic Systems
• ELEC ENG 1102 Digital Electronics
• ELEC ENG 2100 Digital Systems
• ELEC ENG 4056 Real Time & Embedded Systems
• ELEC ENG 4037/7051 Digital Microelectronics

• Current Higher Degree by Research Supervision (University of Adelaide)

  Date	Role	Research Topic	Program	Degree Type	Student Load	Student Name
  2020	Co-Supervisor	The calibration of biometric estimates in Apple Health data for use in forensic investigations	Doctor of Philosophy	Doctorate	Part Time	Mr Luke Jennings

• Past Higher Degree by Research Supervision (University of Adelaide)

  Date	Role	Research Topic	Program	Degree Type	Student Load	Student Name
  2014 - 2018	Principal Supervisor	Interconnect Architectures for Dynamically Partially Reconfigurable Systems	Doctor of Philosophy	Doctorate	Full Time	Ms Thanh Thi Thanh Bui
  2014 - 2021	Co-Supervisor	A Dynamic Spectrum Access Framework (Bring Your Own Spectrum)	Doctor of Philosophy	Doctorate	Full Time	Mrs Madhulika Tripathi
  2013 - 2018	Principal Supervisor	Long-Term Memory for Cognitive Architectures: A Hardware Approach Using Resistive Devices	Doctor of Philosophy	Doctorate	Full Time	Mr Peng Wang
  2013 - 2017	Co-Supervisor	Mapping of Processing Elements of Hardware-based Production Systems on Networks on Chip	Doctor of Philosophy	Doctorate	Full Time	Dr Mostafa Wasiuddin Numan
  2010 - 2015	Co-Supervisor	A Study of Low Power and High Performance Cache Hierarchy for Multi-Core Processor	Doctor of Philosophy	Doctorate	Part Time	Mr Geng Tian
  2008 - 2015	Co-Supervisor	Dynamic Cache Partitioning and Adaptive Cache Replacement Schemes for Chip Multiprocessors	Doctor of Philosophy	Doctorate	Part Time	Miss Norfadila Mahrom
  2007 - 2010	Principal Supervisor	An RNS-Enabled Microprocessor for Public Key Cryptography	Doctor of Philosophy	Doctorate	Full Time	Mr Zhining Lim
  2007 - 2015	Principal Supervisor	Subthreshold and Near Threshold Techniques for Ultra-Low Power CMOS Design	Doctor of Philosophy	Doctorate	Full Time	Mr James Kitchener
  2006 - 2007	Co-Supervisor	New Directions in Advanced RFID Systems	Doctor of Philosophy	Doctorate	Full Time	APrf Damith Ranasinghe
  2005 - 2009	Principal Supervisor	Modular Multiplication in the Residue Number System	Doctor of Philosophy	Doctorate	Full Time	Mr Yinan Kong
  2005 - 2011	Principal Supervisor	Arithmetic Data Value Speculation	Doctor of Philosophy	Doctorate	Full Time	Mr Daniel Kelly
  2003 - 2005	Co-Supervisor	Architectures for Floating-Point Division	Doctor of Philosophy	Doctorate	Full Time	Dr Hooman Nikmehr

• Position: Deputy Dean, Learning and Teaching
• Phone: 83135114
• Email: braden.phillips@adelaide.edu.au
• Fax: 83134360
• Campus: North Terrace
• Building: Ingkarni Wardli, floor 3
• Org Unit: Faculty of Sciences, Engineering and Technology