Michael Liebelt

Research Interests

Computer Hardware & Architecture Microelectronics and Integrated Circuits

EPrf Michael Liebelt

Office of the DVC - Research and Innovation

Research and Innovation

Eligible to supervise Masters and PhD (as Co-Supervisor) - email supervisor to discuss availability.

Michael Liebelt was appointed as a lecturer in Electrical and Electronic Engineering at the University of Adelaide in 1989. He was the Head of the School of Electrical and Electronic Engineering from 2001 until 2010 and was the Deputy Executive Dean of the Faculty of Engineering Computer and Mathematical Sciences from July 2010 until May 2016. He held the position of Interim Executive Dean, Faculty of Sciences between September 2017 and October 2018. He was Pro Vice-Chancellor (Research Operations) and Dean of Graduate Studies from November 2017 until his retirement from the University at the end of 2021.Michael has wide experience as a member of academic boards and boards of directors of several education providers, research commercialization ventures and private companies.His research interests are in computer architecture, particularly asynchronous digital systems and parallel architectures for the implementation of artificial general intelligence. He is a Fellow of the Institution of Engineers, Australia, a Senior Member of the Institute of Electrical and Electronics Engineers, and a member of the Association for Computing Machinery.

Research Interests

  • Computer architecture
  • Asynchronous digital systems
  • Parallel architectures for the implementation of artificial general intelligence
  • Test and testability of digital systems
  • Engineering education

Date Position Institution name
2018 - 2021 Pro Vice-Chancellor (Research Operations) and Dean of Graduate Studies University of Adelaide
2017 - 2018 Interim Executive Dean, Faculty of Sciences University of Adelaide
2016 - ongoing Professor University of Adelaide
2010 - 2016 Deputy Executive Dean University of Adelaide
2006 - 2015 Associate Professor University of Adelaide
2001 - 2010 Head of School University of Adelaide
1996 - 2005 Senior Lecturer University of Adelaide
1989 - 1995 Lecturer University of Adelaide

Date Institution name Country Title
1982 University of Adelaide Australia MEngSc
1979 University of Adelaide Australia BE(Hons)
1978 University of Adelaide Australia BSc

Year Citation
2022 Yuan, X., Liebelt, M. J., Shi, P., & Phillips, B. J. (2022). Cognitive decisions based on a rule-based fuzzy system. Information Sciences, 600, 323-341.
DOI Scopus9 WoS9
2021 Yuan, X., Liebelt, M. J., Shi, P., & Phillips, B. J. (2021). Creating rule-based agents for artificial general intelligence using association rules mining. International Journal of Machine Learning and Cybernetics, 12(1), 223-230.
DOI Scopus6 WoS8
2015 Wang, P., Phillips, B., & Liebelt, M. (2015). Memristor-based activation circuit for longterm memories in cognitive architectures. Electronics Letters, 51(21), 1639-1641.
DOI
2014 Tian, G., & Liebelt, M. (2014). An effectiveness-based adaptive cache replacement policy. Microprocessors and Microsystems, 38(1), 98-111.
DOI Scopus11 WoS6
2007 Malema, G., & Liebelt, M. (2007). Quasi-cyclic LDPC codes of column-weight two using a search algorithm. Eurasip Journal on Applied Signal Processing, 2007(1), 1-8.
DOI Scopus13 WoS7
2007 Malema, G., & Liebelt, M. (2007). High girth column-weight-two LDPC codes based on distance graphs. EURASIP Journal on Wireless Communications and Networking, 2007(1), 1-5.
DOI Scopus11 WoS7
2006 Malema, G., & Liebelt, M. (2006). Deterministic methods for constructing structured LDPC codes with girth six and eight. WSEAS Transactions on Computers, 5(5), 1096-1101.
2001 To, K., Lim, C., Teo, K., & Liebelt, M. (2001). Support vector learning with quadratic programming and adaptive step size barrier-projection. Nonlinear Analysis-Theory Methods & Applications, 47(8 Part 8 Special Issue SI), 5623-5633.
DOI Scopus2 WoS2
2000 Chandrasena, L. H., & Liebelt, M. J. (2000). Rate selection algorithm for quantized undithered dynamic supply voltage scaling. Proceedings of the International Symposium on Low Power Electronics and Design Digest of Technical Papers, 213-215.
Scopus8
1999 Liebelt, M. J., & Burgess, N. (1999). Detecting exitory stuck-at faults in semimodular asynchronous circuits. IEEE Transactions on Computers, 48(4), 442-448.
DOI Scopus4 WoS3
1997 Tabrizi, N., Liebelt, M. J., & Eshraghian, K. (1997). A tabular method for guard strengthening, symmetrization, and operator reduction for Martin's asynchronous design methodology. IEEE Transactions on Computers, 46(9), 1050-1054.
DOI
1997 Abbott, D., Burgess, N., Gray, D., & Liebelt, M. (1997). Towards the realisation of an interactive mobile multimedia personal communicator (IM3PC). Proceedings of the Australian Microelectronics Conference, 18-22.
Scopus3
1997 Appleton, S., Morton, S., & Liebelt, M. (1997). High performance two-phase asynchronous pipelines. IEICE Transactions on Information and Systems, E80-D(3), 287-294.
1997 Appleton, S., Morton, S., & Liebelt, M. (1997). High performance two-phase asynchronous pipelines. IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, E80D(3), 287-295.
1996 Appleton, S. S., Morton, S. V., & Liebelt, M. J. (1996). Technique for high speed asynchronous pipeline control. Electronics Letters, 32(21), 1973-1974.
DOI
1995 Kouzani, A. Z., Bouzerdoum, A., & Liebelt, M. J. (1995). Fuzzy motion estimation. Australian Journal of Intelligent Information Processing Systems, 2(3), 46-55.
1982 Pucknell, D. A., Liebelt, M. J., Raymond, M. L. J., & Wotton, N. (1982). Considerations in setting up supporting facilities for microprocessor applications work and teaching. Software & Microsystems, 1(5), 135-140.
DOI

Year Citation
2020 Mahrom, N., & Liebelt, M. J. (2020). Shared Cache Partitioning Based on Performance Gain Estimations. In IOP Conference Series: Materials Science and Engineering Vol. 767 (pp. 1-11). online: IOP.
DOI
2019 Yuan, X., Liebelt, M. J., Shi, P., & Phillips, B. J. (2019). Development of rule-based agents for autonomous parking systems by association rules mining. In Proceedings of the 19th International Conference on Machine Learning and Cybernetics (ICMLC 2019) Vol. 2019-July (pp. 1-6). Piscataway, NJ: IEEE.
DOI Scopus1 WoS2
2018 Mahrom, N., Liebelt, M., Raof, R., Daud, S., & Ghazali, N. (2018). An Adaptive Insertion and Promotion Policy for Partitioned Shared Caches. In IOP Conference Series: Materials Science and Engineering Vol. 318 (pp. 1-8). online: IOP Publishing.
DOI Scopus2
2017 Yuan, X., Liebelt, M., & Phillips, B. (2017). A cognitive approach for reproducing the homing behaviour of honey bees. In Proceedings of the 9th International Conference on Agents and Artificial Intelligence Vol. 2 (pp. 543-550). Portugal: SCITEPRESS.
DOI Scopus3 WoS3
2017 Phillips, B., & Liebelt, M. (2017). A Flipped Classroom with Low-stakes Assessment to Maintain Student Engagement and Integrate Theory and Practice. In 28th Annual Conference of the Australasian Association for Engineering Education (AAEE 2017) (pp. 639-646). online: AAEE.
2017 Liebelt, M., eglinton-warner, S., soong, W., al-sarawi, S., ng, B., phillips, B., & sorell, M. (2017). An Engineering Approach to Engineering Curriculum Design. In 28th Annual Conference of the Australasian Association for Engineering Education (AAEE 2017) (pp. 777-784). online: AAEE.
2016 Phillips, B., Liebelt, M., & Bui, T. (2016). A Dynamically Reconfigurable NoC for Double-Precision Floating-Point FFT on FPGAs. In CENICS 2016 (pp. 52-57). Online: IARIA.
2015 Numan, M., Frost, J., Phillips, B., & Liebelt, M. (2015). A network-based communication platform for a cognitive computer. In A. Lieto, C. Battaglino, D. Radicioni, & M. Sanguinetti (Eds.), Proceedings of the 3rd International Workshop on Artificial Intelligence and Cognition Vol. 1510 (pp. 94-103). Turin, Italy: RWTH Aachen * Lehrstuhl Informatik V.
Scopus4
2015 Frost, J., Numan, M., Liebelt, M., & Phillips, B. (2015). A new computer for cognitive computing. In Proceedings of the 14th IEEE International Conference on Cognitive Informatics & Cognitive Computing (pp. 33-38). Beijing, China: IEEE.
DOI Scopus8 WoS6
2015 Frost, J., Numan, M., Liebelt, M., & Phillips, B. (2015). A new computer for cognitive computing. In Proceedings of the 14th IEEE International Conference on Cognitive Informatics & Cognitive Computing (pp. 33-38). Beijing, China: IEEE.
DOI Scopus8 WoS6
2013 Al-Sarawi, S., Willison, J., Ng, B., & Liebelt, M. (2013). Degree level evaluation of research skill development framework for higher education. In Proceedings of the 2013 International iCampus Symposium, The Intelligent Campus, IC13 (pp. 46-49). USA: IEEE.
2012 Li, F., Khan, M., Liebelt, M., Ng, B., & Phillips, B. (2012). Is there a smarter way to use 100 billion transistors?. In Proceedings of the Asilomar Conference on Signals, Systems, and Computers, Asilomar 2012 (pp. 619-620). USA: IEEE.
DOI
2011 Tian, G., & Liebelt, M. (2011). Utility-based dynamic cache resizing. In Proceedings of ICCSNT 2011 Vol. 1 (pp. 610-616). CD: IEEE.
DOI Scopus1
2010 Burdeniuk, A., To, K., Lim, C., & Liebelt, M. (2010). An event-assisted sequencer to accelerate matrix algorithms. In Proceedings of the IEEE 5th International Worthshop on Electronic Design, Test and Application (DELTA) (pp. 158-163). USA: IEEE.
DOI Scopus2
2009 Lim, Z., Phillips, B., & Liebelt, M. (2009). Elliptic curve digital signature algorithm over GF(p) on a residue number system enabled microprocessor. In Proceedings of TENCON 2009 (pp. 1-6). CDROM: IEEE.
DOI Scopus9
2008 Moric, R., Phillips, B., & Liebelt, M. (2008). Defect tolerant prefix adder design. In Proceedings of the SPIE Smart Materials, Nano-, and Micro-Smart Systems 2008 Vol. 7268 (pp. 1-9). CD: SPIE.
DOI Scopus1
2008 Xu, X., Lim, C., & Liebelt, M. (2008). Positioning test-benches and test-programs in interaction-oriented system-on-chip verification. In P. Varma (Ed.), Proceedings of HLDVT'08 (pp. 3-10). USA: IEEE.
DOI Scopus1 WoS6
2006 Zhu, Y., Al-Sarawi, S., Lim, C., & Liebelt, M. (2006). Fourth-order discrete-time variable centre frequency bandpass sigma-delta modulator. In L. Yong, & F. Nobuo (Eds.), Proceedings of APCCAS2006 (pp. CDROM821-CDROM824). CDROM: IEEE.
DOI Scopus8
2006 Malema, G., & Liebelt, M. (2006). Very large girth column-weight two quasi-cyclic LDPC codes. In B. Yuan (Ed.), Proceedings of ICSP'06 Vol. 3 (pp. CDROM1-CDROM4). CDROM: IEEE.
DOI
2006 Malema, G., Liebelt, M., & Lim, C. (2006). Reduced wire-length and routing complexity for LDPC decoders. In A. Hariz (Ed.), Proceedings of Microelectronics, MEMS, and Nanotechnology 2005 Vol. 6035 (pp. 60350H-1-60350H-8). http://www.spie.org/conferences/programs/05/au/: SPIE.
DOI
2006 Malema, G., & Liebelt, M. (2006). Very large girth column-weight two quasi-cyclic LDPC codes. In B. Z. Yuan, Q. Q. Ruan, & X. F. Tang (Eds.), 2006 8TH INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING, VOLS 1-4 (pp. 1974-1977). Guilin, PEOPLES R CHINA: IEEE.
2006 Zhu, Y., Al-Sarawi, S. F., Lim, C. C., & Liebelt, M. J. (2006). Fourth-order discrete-time variable centre frequency bandpass sigma-delta modulator. In 2006 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (pp. 820-+). Singapore, SINGAPORE: IEEE.
WoS6
2005 Malema, G., & Liebelt, M. (2005). Low Complexity Regular LDPC codes for Magnetic Storage Devices. In C. Ardil (Ed.), PROCEEDINGS OF WORLD ACADEMY OF SCIENCE, ENGINEERING AND TECHNOLOGY, VOL 7 Vol. 7 (pp. 269-271). Prague, CZECH REPUBLIC: WORLD ACAD SCI, ENG & TECH-WASET.
2005 Zhu, Y., Al-Sarawi, S., & Liebelt, M. (2005). A design methodology for a very low noise figure common-source LNA. In S. Al Sarawi (Ed.), Proceedings of the SPIE International Symposium on Smart Structures, Devices, and Systems II Vol. 5649 (pp. 31-43). Bellingham, Washington, USA: SPIE.
DOI Scopus1
2005 Malema, G., & Liebelt, M. (2005). Interconnection network for structured low-density parity-check decoders. In K. Chung (Ed.), Proceedings of the 2005 Asia-Pacific Conference on Communications Vol. 2005 (pp. 537-540). CD ROM: IEEE.
DOI Scopus5 WoS5
2005 Malema, G., & Liebelt, M. (2005). Low complexity regular LDPC codes for magnetic storage devices. In C. Ardil (Ed.), Proceedings of the International Enformatika Conference (pp. 269-271). http://www.enformatika.org: International Enformatika Society.
WoS1
2004 Malema, G., & Liebelt, M. (2004). Programmable low-density parity-check decoder. In S. Ko (Ed.), Proceedings of the 2004 International Symposium on Intelligent Signal Processing and Communication Systems (pp. 801-804). USA: IEEE.
DOI
2004 Zhu, Y., Al-Sarawi, S., & Liebelt, M. (2004). A 1 GHz differential 2nd-order lowpass sigma delta modulator in CMOS for wireless receivers. In D. Abbott, K. Eshraghian, C. Musca, D. Pavlidis, & N. Weste (Eds.), Microelectronics: design, technology, and packaging Vol. 5274 (pp. 35-46). Bellingham, WA USA: SPIE.
DOI Scopus1 WoS1
2004 Townsend, T., Celenski, P., Al-Sarawi, S., & Liebelt, M. (2004). Hybrid parallel counters - Domino and threshold logic. In IEEE Computer Society Annual Symposium on VLSI : proceedings : Emerging trends in VLSI systems design : 19-20 February, 2004, Lafayette, Louisiana (pp. 275-276). Online: IEEE Computer Society.
DOI Scopus2
2003 Darmani, M., White, L., & Liebelt, M. (2003). New methods for lost voice packet recovery in active networks. In N. Moreton (Ed.), Proceedings of the 11th IEEE International Conference on Networks 2003 (pp. 57-62). NSW: IEEE.
DOI
2003 Darmani, M., White, L., & Liebelt, M. (2003). A new voice packing scheme to recover the lost packets using active networks. In M. Hakkak (Ed.), Proceedings of 2003 International Symposium on Telecommunications (pp. CDROM 95-CDROM 99). CDROM: Iran Telecom Research Center.
2003 Tan, D., Danysh, A., & Liebelt, M. (2003). Multiple-precision fixed-point vector multiply-accumulator using shared segmentation. In Computer Arithmetic, 2003, Proceedings, 16th IEEE symposium. 15-18 June, 2003 (pp. 12-19). Online: IEEE.
DOI Scopus23 WoS17
2002 Zhu, Y., Al-Sarawi, S., & Liebelt, M. (2002). Variable centre frequency bandpass sigma-delta modulator. In E. Harvey, D. Abbott, & V. Varadan (Eds.), Proceedings of SPIE Vol. 4935 Vol. 4935 (pp. 197-204). CDROM: SPIE.
DOI Scopus1
2001 Chandrasena, L., Chandrasena, P., & Liebelt, M. (2001). An energy efficient rate selection algorithm for voltage quantized dynamic voltage scaling. In El Mostapha Aboulhamid (Ed.), Proceedings of the 14th International Symposium on System Synthesis (pp. 124-129). PO Box 11405 New York, NY 10286-1405, United States: Association for Computing Machinery Inc.
DOI Scopus24 WoS13
2001 Townsend, T., & Liebelt, M. (2001). Improved heuristics for optimal parallel multiplier synthesis. In P. Franzon (Ed.), Proceedings of Design, Characterization, and Packaging for MEMS and Microelectronics II Vol. 4593 (pp. 209-219). USA: THE SOCIETY OF PHOTO-OPTICAL INSTRUMENTATION ENGINEERS.
DOI
2000 Liebelt, M., & Lim, C. (2000). A method for determining whether asynchronous circuits are self-checking. In Cheng Wen Wu (Ed.), Proceedings of the Ninth Asian Test Symposium (ATS 2000) (pp. 472-477). Los Alamitos, California, USA: IEEE Computer Society.
DOI
2000 Biglari-Abhari, M., Eshraghian, K., & Liebelt, M. (2000). Improving binary compatibility in VLIW machines through compiler assisted dynamic rescheduling. In F. Vajda (Ed.), Proceedings of the 26th Euromicro Conference Vol. 1 (pp. 386-393). Los Alamitos, California, USA: IEEE Computer Society.
DOI
2000 Chandrasena, L., & Liebelt, M. (2000). A Rate Selection Algorithm for Quantized Undithered Dynamic Supply Voltage Scaling. In D. Blaauw, C. Co-Chairs, T. Gabara, & E. Co-Chairs (Eds.), Proceedings of the 2000 International Symposium on Low Power Electronics and Design (pp. 213-215). New York, New York, USA: Association for Computing Machinery.
DOI Scopus2 WoS2
2000 Chandrasena, L., & Liebelt, M. (2000). Energy minimization in dynamic supply voltage scaling systems using data dependent voltage level selection. In J. Vandewalle, & G. Co-Chairs (Eds.), Proceedings of ISCAS 2000 - The IEEE International Symposium on Circuits and Systems Vol. 2 (pp. 525-528). Piscataway, NJ,USA: IEEE Service Center.
DOI Scopus1 WoS1
2000 Chandrasena, L., & Liebelt, M. (2000). A comprehensive analysis of energy savings in dynamic supply voltage scaling systems using data dependent voltage level selection. In S. Chair (Ed.), Proceedings of 2000 IEEE International Conference on MultiMedia and Exposition Vol. 2 (pp. 995-998). Piscataway, NJ, USA: IEEE Service Center.
DOI Scopus2
2000 Chandrasena, L. H., & Liebelt, M. J. (2000). Energy minimization in dynamic supply voltage scaling systems using data dependent voltage level selection. In Proceedings IEEE International Symposium on Circuits and Systems Vol. 2 (pp. I-525-I-528). IEEE.
DOI Scopus6
1999 To, K., Lim, C. C., Beaumont-Smith, A., Liebelt, M. J., & Marwood, W. (1999). Array processor architecture for support vector learning. In International Conference on Knowledge Based Intelligent Electronic Systems Proceedings KES (pp. 377-380). IEEE.
DOI Scopus2
1998 Beaumont-Smith, A., Tsimbinos, J., Marwood, W., Lim, C., & Liebelt, M. (1998). A matrix processor implementation of the volterra model. In IEEE Transactions on Signal Processing Vol. 46 (pp. 1780).
1998 Beaumont-Smith, A., Lim, C. C., To, K. N., Liebelt, M. J., & Marwood, W. (1998). MatRISC-1: A RISC multiprocessor for matrix based real-time applications. In K. A. Hawick, & H. A. James (Eds.), Proceedings of PART '98 : the 5th Australasian Conference on Parallel and Real-time Systems (pp. 320-331). Singapore: Springer-Verlag.
1998 Beaumont-Smith, A., Burgess, N., Cui, S., & Liebelt, M. (1998). GaAs multiplier and adder designs for high-speed DSP applications. In M. P. Fargues, & R. D. Hippenstiel (Eds.), Conference Record of the Asilomar Conference on Signals Systems and Computers Vol. 2 (pp. 1517-1521). PACIFIC GROVE, CA: IEEE COMPUTER SOC.
Scopus1
1998 Biglari-Abhari, M., Liebelt, M. J., & Eshraghian, K. (1998). Implementing a VLIW compiler: Motivation and trade-offs. In J. Morris (Ed.), PROCEEDINGS OF THE 3RD AUSTRALASIAN COMPUTER ARCHITECTURE CONFERENCE, ACAC'98 Vol. 20 (pp. 37-46). PERTH, AUSTRALIA: SPRINGER-VERLAG SINGAPORE PTE LTD.
WoS1
1998 Beaumont-Smith, A., Marwood, W., To, K., Lim, C. C., & Liebelt, M. J. (1998). MatRISC-1: A RISC multiprocessor for matrix-based real time applications. In Proceeedings of the Fifth Australian Conference on Parallel and Real-Time Systems (PART'98) (pp. 320-331). Adelaide.
1998 To, K., Marwood, W., Lim, C. C., Liebelt, M. J., & Beaumont-Smith, A. (1998). Simulated performance of selected signal processing algorithms on the MatRISC architecture. In Proceedings of the 4th International Conference on Optimization: Techniques and Applications (pp. 907-914). Perth.
1997 Appleton, S. S., Morton, S. V., & Liebelt, M. J. (1997). New method for asynchronous pipeline control. In Proceedings of the IEEE Great Lakes Symposium on VLSI (pp. 100-104). URBANA, IL: I E E E, COMPUTER SOC PRESS.
DOI
1997 Tabrizi, N., Liebelt, M., & Eshraghian, K. (1997). Delay hazards in two level asynchronous VLSI circuits synthesised from signal transition graphs. In Proceedings of the Australian Microelectronics Conference (pp. 276-281).
1997 Appleton, S. S., Morton, S. V., & Liebelt, M. J. (1997). Two-phase asynchronous pipeline control. In Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems (pp. 12-21). EINDHOVEN, NETHERLANDS: I E E E, COMPUTER SOC PRESS.
DOI Scopus5 WoS2
1997 Beaumont-Smith, A., Liebelt, M., Lim, C., To, K., & Marwood, W. (1997). Digital signal multi-processor for matrix applications. In Proceedings of the Australian Microelectronics Conference (pp. 245-250).
Scopus3
1996 Tabrizi, N., Liebelt, M. J., & Eshraghian, K. (1996). Delay hazards in complex gate based speed independent VLSI circuits. In Proceedings of the IEEE Great Lakes Symposium on VLSI (pp. 266-271). AMES, IA: I E E E, COMPUTER SOC PRESS.
DOI Scopus1 WoS1
1996 Tabrizi, N., Liebelt, M. J., & Eshraghian, K. (1996). Dynamic hazards and speed independent delay model. In Proceedings 2nd International Symposium on Advanced Research in Asynchronous Circuits and Systems Async 1996 (pp. 94-103). AIZU WAKAMATSU, JAPAN: I E E E, COMPUTER SOC PRESS.
DOI Scopus1 WoS1
1995 Bouzerdoum, A., Kouzani, A. Z., & Liebelt, M. J. (1995). Motion estimation using a fuzzy neural network. In Proceedings of the IEEE International Conference on Systems Man and Cybernetics Vol. 5 (pp. 4632-4636). VANCOUVER, CANADA: I E E E.
1995 Cui, S., Burgess, N., Liebelt, M., & Eshraghian, K. (1995). GaAs IEEE floating point standard single precision multiplier. In S. Knowles, & W. H. McAllister (Eds.), Proceedings Symposium on Computer Arithmetic (pp. 91-97). BATH, ENGLAND: I E E E, COMPUTER SOC PRESS.
DOI Scopus3 WoS2
1995 Morton, S. V., Appleton, S. S., & Liebelt, M. J. (1995). ECSTAC: a fast asynchronous microprocessor. In Asynchronous Design Methodologies Working Conference Proceedings (pp. 180-189). LONDON, ENGLAND: I E E E, COMPUTER SOC PRESS.
DOI Scopus7 WoS2
1995 Cui, S., Burgess, N., Liebelt, M., & Eshraghian, K. (1995). A 32-bit GaAs IEEE floating point multiplier using Trailing-1's rounding algorithm. In Proceedings Electronic Technology Directions to the Year 2000 Etd 1995 (pp. 246-252). IEEE Comput. Soc. Press.
DOI Scopus1
1994 Kouzani, A. Z., Bouzerdoum, A., & Liebelt, M. (1994). Motion detection and velocity estimation using cellular automata. In Australian and New Zealand Conference on Intelligent Information Systems Proceedings (pp. 327-331). IEEE.
DOI
1994 Morton, S. V., Appleton, S. S., & Liebelt, M. J. (1994). Event controlled reconfigurable multi-chip FFT. In undefined (pp. 144-153). IEEE Comput. Soc. Press.
DOI Scopus2
Date Project Title Investigators Funding Body Amount
2004 - 2008 Hardware Verification Techniques for Complex High Performance Systems-on-a-chip Lim C, Liebelt M, Parashkevov A Australian Research Council AUD 385,184
2002 - 2004 Multi-channel reconfigurable high dynamic range digital receivers Lim C, Marwood W, Choi J, Cumpston S, Liebelt M, Massie A Australian Research Council AUD 646,773
2002 - 2006 National Networked Tele-Test Facility for Integrated Systems (NNTTFIS) Liebelt M Department of Industry, Science and Resources ---
2001 Power estimation for asynchronous circuits, based on high level specifications Liebelt M The University of Adelaide AUD 7,500
2000 Implementation of QP optimisation on a parallel matrix processor Lim C, Liebelt M Australian Research Council AUD 10,000
1999 High Level Synthesis of Asynchronous Systems Ashenden P, Liebelt M Australian Research Council AUD 5,000
1999 Feasibility Study for Real Time Array Processing Lim C, Liebelt M Australian Research Council AUD 11,000
1998 - 1999 High Performance Asynchronous Pipelining Techniques in General Purpose RISC Processors Liebelt M Australian Research Council AUD 18,000
1997 Study of advanced asynchronous design issues based on extension of the event controlled systems design methodology Liebelt M Australian Research Council AUD 12,000
1996 Study of System Level Asynchronous Design Issues based on Extension of the Event Controlled Systems Design Methodology Liebelt M Australian Research Council AUD 15,000
1996 - 1998 A very high performance Matrix and Tensor Processor Lim C, Marwood W, Liebelt M, Eshraghian K Australian Research Council AUD 210,259
1994 - 1995 Development of the event controlled systems design methodology through implementation of an 8 Bit RISC Microprocessor Liebelt M Australian Research Council AUD 15,000
1993 - 1995 Electronic Vision System for real-time applications Liebelt M Department of Education, Employment and Workplace Relations AUD 40,000

 

Courses Summary

Date Taught Developed  Coordinated Course Title Institution Course Level/ Code URL
2018 x x x Design and Innovation University of Adelaide ELEC ENG 2103 Course outline
2017 x x x Analog Electronics University of Adelaide ELEC ENG 1100 Course outline
2017 x x x Electronic Systems University of Adelaide ELEC ENG 1101 Course outline
2017 x x   Electronic Circuits University of Adelaide ELEC ENG 2101 Course outline
2017 x x   Electronic Circuits M University of Adelaide ELEC ENG 2105 Course outline
2017 x x x Design and Innovation University of Adelaide ELEC ENG 2103 Course outline
2017     x Systems Engineering Management University of Adelaide ELEC ENG 4055 Course outline
2017     x Business Management Systems UG University of Adelaide ELEC ENG 4064 Course outline
2017     x Engineering Communication and Critical Thinking (semester 1) University of Adelaide ELEC ENG 7057 Course outline
2017     x Engineering Communication and Critical Thinking (semester 2) University of Adelaide ELEC ENG 7057 Course outline
2017     x Business Management Systems PG University of Adelaide ELEC ENG 7164 Course outline

Awards

2017: Australian Awards for University Teaching (AAUT) Citation for Outstanding Contributions to Student Learning

2016: Stephen Cole the Elder Award for Excellence, in the category of Leadership, Support and Enhancement of Teaching Practice

2016: Vice-Chancellor and President's Award for Excellence in Learning and Teaching

Date Role Research Topic Program Degree Type Student Load Student Name
2020 - 2022 Co-Supervisor Forensic applications of analog memory: the digital evidence bag Master of Philosophy Master Part Time Mr Benjamin James Agnew
2017 - 2021 Principal Supervisor Multi-Approaches to Achieve an Advanced Cognitive Agent in a New Type of Parallel Processing Computer Doctor of Philosophy Doctorate Full Time Dr Xin Yuan
2014 - 2018 Co-Supervisor Interconnect Architectures for Dynamically Partially Reconfigurable
Systems		 Doctor of Philosophy Doctorate Full Time Ms Thanh Thi Thanh Bui
2013 - 2018 Co-Supervisor Long-Term Memory for Cognitive Architectures: A Hardware Approach Using Resistive Devices Doctor of Philosophy Doctorate Full Time Mr Peng Wang
2013 - 2017 Principal Supervisor Mapping of Processing Elements of Hardware-based Production Systems on Networks on Chip Doctor of Philosophy Doctorate Full Time Dr Mostafa Wasiuddin Numan
2011 - 2021 Co-Supervisor Exploring the forces shaping the modern university – the existential challenges of thought leaders managing the foundational values with the functional drivers – a case study of South Australia Doctor of Philosophy Doctorate Part Time Dr Kym Teh
2010 - 2015 Principal Supervisor A Study of Low Power and High Performance Cache Hierarchy for Multi-Core Processor Doctor of Philosophy Doctorate Part Time Mr Geng Tian
2008 - 2015 Principal Supervisor Dynamic Cache Partitioning and Adaptive Cache Replacement Schemes for Chip Multiprocessors Doctor of Philosophy Doctorate Part Time Miss Norfadila Mahrom
2007 - 2010 Co-Supervisor An RNS-Enabled Microprocessor for Public Key Cryptography Doctor of Philosophy Doctorate Full Time Mr Zhining Lim
2007 - 2009 Co-Supervisor Design Study of Energy-Efficient Routing Protocol for Wireless Sensor Networks Master of Engineering Science Master Full Time Mr Lifang Lu
2007 - 2009 Co-Supervisor Software-Centric and Interaction-Oriented System-on-Chip Verification Doctor of Philosophy Doctorate Full Time Mr Xiao Xi Xu
2007 - 2015 Co-Supervisor Subthreshold and Near Threshold Techniques for Ultra-Low Power CMOS Design Doctor of Philosophy Doctorate Full Time Mr James Kitchener
2006 - 2008 Co-Supervisor Adaptive Antenna Array Processing for GPS Receivers Master of Engineering Science Master Full Time Mr Yaohua Zheng
2006 - 2011 Co-Supervisor Random Access Schemes for Multichannel Communication and Multipacket Reception in Wireless Networks Doctor of Philosophy Doctorate Part Time Mr Hyuk Lee
2004 - 2011 Co-Supervisor Signalling Requirements for Smart Pricing in Mobile Telecommunications Systems Master of Engineering Science Master Part Time Dat Vo
2004 - 2014 Co-Supervisor A Mesh Architecture for Data Management of Matrix Computations Doctor of Philosophy Doctorate Full Time Mr Adam Burdeniuk
2003 - 2007 Principal Supervisor Low-Density Parity-Check Codes: Construction and Implementation Doctor of Philosophy Doctorate Full Time Mr Gabofetswe Malema
2003 - 2007 Co-Supervisor The Mesh -A Universally Integrated Design Approach for Device Control Doctor of Philosophy Doctorate Full Time Mr Martin Strange
2003 - 2010 Co-Supervisor Verification of System-on-Chips using Genetic Evolutionary Test Techniques from a Software Applications Perspective Doctor of Philosophy Doctorate Full Time Dr Adriel Cheng
2003 - 2010 Co-Supervisor Capacity of Multiple-Input Multiple-Output Wireless Communication Systems Operating in the HF Band Doctor of Philosophy Doctorate Full Time Mr Nigel Brine
2002 - 2007 Co-Supervisor Downlink Resource Allocation for Orthogonal Frequency Division Multiple Access Systems Doctor of Philosophy Doctorate Full Time Mr Kit Chee
2001 - 2004 Principal Supervisor Design and Analysis of Visual Programming Language for PIC Microcontrollers Master of Engineering Science Master Full Time Mr Jeng Kong
2001 - 2004 Principal Supervisor Lost VOIP Packet Recovery in Active Networks Doctor of Philosophy Doctorate Full Time Mr Mohammad Yousef Darmani
2001 - 2008 Co-Supervisor Design of a Direct Downconversion Receiver for IEEE802.11a WLAN Doctor of Philosophy Doctorate Full Time Dr Yingbo Zhu
1999 - 2003 Principal Supervisor The Study of Trace Cache Memory on Superscalar DLX Processor Master of Engineering Science Master Full Time Mr Apisake Hongwitayakorn
1997 - 2002 Principal Supervisor Algorithms and Architectures for Low-Density Parity-Check Codecs Doctor of Philosophy Doctorate Full Time Dr Chris Howland
1997 - 2002 Principal Supervisor Listless Zerotree Image and Video Coding Doctor of Philosophy Doctorate Full Time Mr Wen-Kuo Lin
1996 - 2005 Principal Supervisor Energy Minimization of Portable Multimedia Systems through Rate Selection and Dynamic Voltage Scaling Doctor of Philosophy Doctorate Full Time Mr Lama Hewage VP Chandrasena
1995 - 2003 Principal Supervisor Multiport Memory as a Medium for Interprocessor Communication in Multiprocessors Doctor of Philosophy Doctorate Full Time Mr Nasser Asgari

Date Role Board name Institution name Country
2018 - ongoing Member College Council Kathleen Lumley College, Inc. Australia
2017 - 2018 Member College Council St Ann's College, Inc. Australia

Connect With Me

External Profiles

Other Links