Dominic Lane

Dominic Lane

School of Electrical and Electronic Engineering

Faculty of Sciences, Engineering and Technology

My research interests are in high-power lasers for defence applications, quantum electronic devices, compound semiconductor device fabrication, characterization and crystal growth (molecular beam epitaxy).

  • Journals
    Year Citation
    2022 Hodgson, P. D., Lane, D., Carrington, P. J., Delli, E., Beanland, R., & Hayne, M. (2022). ULTRARAM: A Low‐Energy, High‐Endurance, Compound‐Semiconductor Memory on Silicon. Advanced Electronic Materials, 8(4), 2101103.
    DOI
    2021 Lane, D., & Hayne, M. (2021). Simulations of resonant tunnelling through InAs/AlSb heterostructures for ULTRARAM™ memory. Journal of Physics D: Applied Physics, 54(35), 355104.
    DOI Scopus1 WoS1
    2021 Lane, D., Hodgson, P. D., Potter, R. J., Beanland, R., & Hayne, M. (2021). ULTRARAM: Toward the Development of a III–V Semiconductor, Nonvolatile, Random Access Memory. IEEE Transactions on Electron Devices, 68(5), 2271-2274.
    DOI Scopus4 WoS4
    2020 Lane, D., & Hayne, M. (2020). Simulations of Ultralow-Power Nonvolatile Cells for Random-Access Memory. IEEE Transactions on Electron Devices, 67(2), 474-480.
    DOI Scopus8 WoS7
    2018 Keen, J. A., Lane, D., Kesaria, M., Marshall, A. R. J., & Krier, A. (2018). InAs/InAsSb type-II strained-layer superlattices for mid-infrared LEDs. Journal of Physics D: Applied Physics, 51(7), 075103.
    DOI Scopus16 WoS13

  • Conference Papers
    Year Citation
    2021 Lane, D., Hodgson, P., Potter, R., & Hayne, M. (2021). Demonstration of a Fast, Low-Voltage, III-V Semiconductor, Non-Volatile Memory. In 2021 5th IEEE Electron Devices Technology & Manufacturing Conference (EDTM). Chengdu, China: IEEE.
    DOI

  • Conference Items
    Year Citation
    2022 Hodgson, P., Lane, D., Carrington, P., & Hayne, M. (2022). ULTRARAM™: a III-V non-volatile memory on Si substrates. Poster session presented at the meeting of UK Semiconductors 2022.
    2022 Xiu, X., Lane, D., Hodgson, P., & Hayne, M. (2022). Scaling of ULTRARAM™ III- Sb charge-storage devices for non-volatile random access memories. Poster session presented at the meeting of UK Semiconductors 2022.
    2022 Jones, S., Lane, D., Hodgson, P., & Hayne, M. (2022). Experimental comparison of GaAs/AlGaAs DBRs and ohmic contacts for improved electrical injection in GaSb quantum-ring VCSELs. Poster session presented at the meeting of UK Semiconductors 2022.
    2021 Lane, D., Hodgson, P., & Hayne, M. (2021). III-V nonvolatile ULTRARAM™ 2x2 memory arrays. Poster session presented at the meeting of APL Material Challenges for Memory (MCfM) conference 2021.
    2018 Lane, D. (2018). A new memory device for a low power, non-volatile, non-destructive RAM. Poster session presented at the meeting of UK Semiconductors.

  • Patents
    Year Citation
    2022 Lane, D., & Hayne, M. (2022). CN114080682, IMPROVEMENTS RELATING TO ELECTRONIC MEMORY DEVICES. Various.
    2022 Lane, D., & Hayne, M. (2022). EP3977457, IMPROVEMENTS RELATING TO ELECTRONIC MEMORY DEVICES. Europe.
    2022 Lane, D., & Hayne, M. (2022). US20220230686, IMPROVEMENTS RELATING TO ELECTRONIC MEMORY DEVICES. USA.

  • Theses
    Year Citation
    2021 Lane, D. (2021). ULTRARAM™: Design, Modelling, Fabrication and Testing of Ultra-low-power III-V Memory Devices and Arrays. (PhD Thesis, Lancaster University).
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